Usb3 on kate's lab notebook

USB3: why it's a bit harder than USB2

Tue, 06 Oct 2020 16:05:23 -0600

A few people on twitter have asked me to explain why the USB3 winds up being much harder to implement than USB2. The answer is more than will fit in a single tweet, so I thought I’d put a quick-but-rough answer, here. This is by no means comprehensive; consider it ~~a longer tweet~~ what a tweet would be given I had more than 240 characters and a proclivity to babble. (I do.)

Corrections to: USB 3.0 Technology: Comprehensive Guide to SuperSpeed USB

Sun, 04 Oct 2020 17:10:55 -0600

The MindShare book USB 3.0 Technology: Comprehensive Guide to SuperSpeed USB (ISBN-13: 978-0983646518) is a pretty decent reference for implementers of USB 3.0 / Gen1; but is published with a few factual mistakes – places where their tables incorrectly copy the standard. This notebook post is here to gather the mistakes I’ve found, so I can report them the publisher all at once.

Issues thus far (page numbers for first edition):

AB07-USB3FMC: The $1.65k eval board they can't be bothered to test

Sat, 26 Sep 2020 07:06:39 -0600

I’ve written a bit about my look at “commercial off-the-shelf” USB3 PHY boards; and have been taking a look recently at the Design Gateway AB07-USBFMC module. It turns out that my unit has what seems to be a pretty embarrassing defect.

I’ve been testing my in-progress USB3 gateware with this PHY; and I’ve been running into an interesting issue: periodically, some of the raw values sent were off by a single bit.

AB07-USB3FMC Notes & Oddities

Fri, 25 Sep 2020 21:34:32 -0600

If you’re looking to play with commercial USB3 PHY evaluation hardware – that is, if you’re looking to get a board someone else has designed and built, rather than soldering up your own or experimenting with 5G SerDes – there seem to be two options available: the HiTech Global FMC_USB3 ($795 USD), or the Design Gateway AB07-USBFMC ($1,650 USD).

The USB3FMC sitting atop the Digilent Nexys Video FPGA board

Thanks to Tim Ansell, I’ve been able to get my hands on the AB07-USBFMC; this quick post summarizes my findings so far working with the board.

USB3 LFPS Using ECP5 SerDes I/O

Tue, 01 Sep 2020 11:38:10 -0600

Lately, I’ve been developing a USB3 stack, and a USB3 frontend using the ECP5 SerDes. The ECP5 SerDes seems almost perfect for USB3, which shares many of its implementation details with PCIe. However, there are a couple of hitches.

The more difficult to deal with is support for USB3’s Low Frequency Periodic Signaling (LFPS). LFPS carries small bursts of information via a slow, out-of-band signal, meant to be used before the high-speed USB3 link is established: